发明名称 READ ONLY MEMORY
摘要 PURPOSE:To control a threshold voltage value accurately, by constituting a plurality of MISFETs having double gates of polySi and metal or silicide with the polarity of the polySi gates as of a p<+>-type or an n<+>-type. CONSTITUTION:A plurality of bit transistors B-Tr1-B-Tr4 and the like, are connected in series in the direction perpendicular to word lines on a p<->-type Si substrate 1. All the said transistors are formed as n-MOSFETs having double- gate electrodes (word lines WL1-WL4) comprising p<+>-type polySi gates 10A-10D and the like, which include high concentration boron in a saturated state beforehand, and metal titanium layers 11. When fixed information is written, a mask film 7 having holes is formed on the desired bit transistors B-Tr1 and B-Tr3. phosphorus ions are implanted through the holes in the film 7, and n<+>-type polySi gates 12A and 12C are formed.
申请公布号 JPS63233561(A) 申请公布日期 1988.09.29
申请号 JP19870068208 申请日期 1987.03.23
申请人 FUJITSU LTD 发明人 SHIRATO TAKEHIDE
分类号 H01L29/78;H01L21/8246;H01L27/112 主分类号 H01L29/78
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