发明名称 MEMORY PROTECTING DEVICE
摘要 PURPOSE:To prevent the mutual interference of memory areas without increasing the load to an OS nor reduction of the executing speed, by permitting an access with reference to a table against the combination of the types between accesses and memory areas. CONSTITUTION:A logical address outputted from a processor 1 includes an access bit showing the classification of a relevant access. The high-order bits of the logical address show the page numbers with the low-order bits showing the intra-page addresses respectively. On the other hand, a page map 4 stores the protection bits to the page numbers and the page numbers are given to the map 4 from a memory control unit MMU2. Then the corresponding protection bit is extracted. This protection bit and the access bit are set opposite to each other on a table of a comparison means 5 for decision of access permission or inhibition. As a result, the mutual interference is avoided among divided memory areas without deteriorating the fast executing speed.
申请公布号 JPS63240657(A) 申请公布日期 1988.10.06
申请号 JP19870073002 申请日期 1987.03.28
申请人 TOSHIBA CORP 发明人 MAEDA KENICHI;SAITO MITSUO;AIKAWA TAKESHI;OKAMURA MITSUYOSHI;MATOBA TSUKASA
分类号 G06F12/14;G06F21/24 主分类号 G06F12/14
代理机构 代理人
主权项
地址