发明名称 AFFINE TRANSFORMATION PROCESSOR
摘要 PURPOSE:To carry out an affine transformation by 2n-line memories by subtracting (n) from an added value according to a necessity at the time of designating the line memory for writing a picture signal according to the accumulated and added value of a micro increment parameter. CONSTITUTION:In a digital differentiating analyzer 1, the micro increment parameter DELTAY is accumulated, added and the high-order three bit integer part thereof is outputted. An input picture signal A is written in one of FIFO (first in and first out) 12-19 through one of data selectors 4-11 designated by a data demultiplexer (DMUX)3 according to the value of the integer part. At this time, when the value of an (m)-ary counter 20 for counting the address of an X axis direction is the multiple of integer against (m) and the value of the integer part is larger than (n), the (n) is subtracted from said integer part by an exclusive OR circuit 2. Accordingly, the value inputted to the DMUX3 does not exceed 2n and the FIFO is satisfied by 2n.
申请公布号 JPS63262772(A) 申请公布日期 1988.10.31
申请号 JP19870096156 申请日期 1987.04.21
申请人 CANON INC 发明人 IDEI KATSUTO;MITA YOSHINOBU;SATO MAMORU;ENOKIDA MIYUKI;ISHIDA YOSHIHIRO
分类号 G06T3/00 主分类号 G06T3/00
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