发明名称 SEMICONDUCTOR CIRCUIT
摘要 PURPOSE:To attain the discrimination of even/odd of an external digital signal together with the input/output of the said digital signal by providing an exclusive OR circuit and a larch circuit and inputting the digital signal to the exclusive OR circuit sequentially. CONSTITUTION:An information communication data signal 4 is inputted to a latch circuit 2. When the level of an input data is at '1' in this case, an even/odd discrimination signal 5 goes to '1' by the exclusive OR circuit 1 and when the input data is at 'phi', the even/odd discrimination signal 5 goes to 'phi'. Then the value of the even/odd discrimination signal 5 is inputted to the latch circuit 30 in the next phase. Since the next data is inputted to the latch circuit 2 in the said phase, the exclusive OR circuit 1 outputs the result of even/odd discrimination of the information communication data signal 4 as the even/odd discrimination signal 5. Thus, the even/odd discrimination of the information communication data signal is applied by a delay or the gate delay of the exclusive OR circuit 1 only.
申请公布号 JPS63279619(A) 申请公布日期 1988.11.16
申请号 JP19870115284 申请日期 1987.05.12
申请人 MITSUBISHI ELECTRIC CORP 发明人 MACHIDA HIROHISA;NAKABAYASHI TAKEO
分类号 H03M13/00;H03M5/18;H03M13/09;H04L25/49 主分类号 H03M13/00
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