发明名称 IMAGE SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To omit a ROM by previously setting a filter factor in register by a CPU and executing vertical or horizontal filtering based on the specified factor. CONSTITUTION:An image signal Xn of an n-th line is outputted from a line memory 10 and inputted to a line memory 20 and an image signal Xn-1 of an (n-1)th line is outputted from the line memory 20. A multiplier 70 inputs a factor alpha previously set by the CPU and the Xn to execute the arithmetric operation of alphaXn. An adder 30 inputs the image signal Xn+1 of the (n+1)th line and the image signal Xn-1 of the (n-1)th line and executes the arithmetric operation of (Xn+1+Xn-1) and inputs the computed result to a multiplier 80. The multiplier 80 inputs the (Xn+1+Xn-1) and a factor beta previously set in a register 100 by the CPU and executes the arithmetric operation of beta(Xn+1+Xn-1). An adder 90 inputs the computed results of the multipliers 70, 80 and outputs the vertical filtering result of Yn=alphaXn+beta(Xn+1+Xn-1). Consequently, the ROM in an ordinary circuit can be omitted by setting the vertical and horizontal filter factors from the outside, e.g. the CPU.
申请公布号 JPS63282888(A) 申请公布日期 1988.11.18
申请号 JP19870118434 申请日期 1987.05.15
申请人 NEC CORP 发明人 TAKAHARA TORU;OSHIRO MASAHIRO
分类号 H04N1/409;G06F17/10;G06T5/20;H04N1/40 主分类号 H04N1/409
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