| 摘要 |
PURPOSE:To obtain a bus control system which can freely execute accessing on both buses by connecting first and second buses by means of a bus controller and controlling the connection and separation of the first and the second buses in accordance with addresses at the tie of data transfer. CONSTITUTION:The side of the CPU bus 10 is taken precedence and a releasing instruction is outputted to an I/O bus master 70-k. If the I/O bus master 70-k responses to it, the bus controller 60 obtains the I/O bus 20 and connects two buses. Thus, a bus master 40-i executes data transfer. When it is terminated, the master 40-i releases the CPU bus and the controller 60 releases the I/O bus and disconnects both buses. Thus, the master 70-k obtains the bus 20 which has temporarily released. Consequently, the controller 60 outputs a bus request to a CPU bus arbiter 30 and connects the bus after it receives use permission. if the master 70-k releases the bus 20 after data transfer, the controller 60 releases the bus 10 and disconnects both buses.
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