| 摘要 |
PURPOSE:To efficiently transmit and receive data, and in addition, to detect the error of plural bits by transmitting the transmission data and its inverted data alternately, and detecting the inversion of the data by a reception circuit side. CONSTITUTION:The transmission data is inverted by a data inversion circuit 12, and the inverted data is inputted to a selector circuit 13 together with the transmission data from a data register 11. The selector circuit 13 outputs alternately and successively the transmission data and the inverted data to a transmission line 3 according to a control signal 13a. The register 21 at a receiving side latches the data, selected by the selector circuit 13, according to a clock signal 21a, and an inversion detection circuit 22 outputs 1, only when the data from the selector circuit 13 and the data from the register 21 do not coincide. A flip flop circuit 23 holdes the output of the inversion detection circuit 22 by a strobe signal 23a. Thus, because the error of the plural bits can be simultaneously detected, and besides, a parity bit is not necessitated, the data can be easily transmitted and received.
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