| 摘要 |
PURPOSE:To secure a required channel width, to reduce a required area and to implement high density, by providing a source and a drain comprising two diffused layers formed in the vicinity of the surface of a main plane and the bottom part and a gate electrode by utilizing a hole, which is provided on one main plane side of a semiconductor substrate, and providing a channel, which is formed on the wall of the hole side by applying a voltage to the gate electrode. CONSTITUTION:An N<+> diffused layer 2 is arranged at the deep part of a P-type Si substrate 1. A polycrystalline silicon region 5 is formed in contact with a central region. An N<+> diffused layer 3 is formed in the vicinity of the surface of the substrate 1. A tubular gate electrode 4 is arranged so as to surround the polycrystalline silicon region 5 so that the electrode is extended in the vertical direction. Either of the N<+> diffused layer 2 or the N<+> diffused layer 3 is made to function as a source and the other is made to function as a drain. When a positive voltage is applied to the gate electrode 4, electrons in the substrate 1 are attracted to the gate electrode 4. An N-type channel 6, which is extended in parallel with the gate electrode 4 in the vertical direction, is formed. Therefore, the planar forming region of a MOS FET is reduced. A high density can be achieved. The required width of the channel can be readily secured.
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