| 摘要 |
PURPOSE:To obtain synchronizing signals at a high detection factor without increasing the word length of the synchronizing signals, by comparing successively arriving field addresses with a field address which is properly detected on the reproducing side based on the field address being used as a reference, and regarding the successively arriving field addresses as synchronizing signals. CONSTITUTION:The output of a synchronizing field address discrepancy circuit 12 and field clock signals are inputted to a field address counter circuit 18 through an input terminal 6. When the output of the circuit 12 is non-coincident and the output of a 1st field address coincidence circuit 5 is coincident, the content of a 2nd field address latching circuit 4 is preset in the field address counter circuit 8 and the field clocks are counted up as the clock input of the counter circuit 8. When such as constitution is used, synchronizing signals can be detected at a high detection factor without increasing the word length of the synchronizing signals.
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