发明名称 INTERRUPTION SYSTEM FOR MICROPROCESSOR
摘要 PURPOSE:To speed up task switching by providing a saving and releasing processing part and saving the content of a register in parallel with an interruption processing routine. CONSTITUTION:The saving and releasing processing part is given. When a program information storage means on the side of A is used, and acceptable interruption occurs under a state that the program is executed, new program information is read from an external memory, stored in a program information storage means on the side of B, and content of the program information storage means on the side of A is saved in an interruption processing stack. When a termination instruction is issued, the program information storage means on the side of A is connected to an internal bus, and program information of the interruption processing stack is loaded on the program information storage means on the side of B. Thus, the saving and releasing of the state at the time of interruption processing can be executed at high speed.
申请公布号 JPS63311538(A) 申请公布日期 1988.12.20
申请号 JP19870148497 申请日期 1987.06.15
申请人 PFU LTD 发明人 YOSHIMOTO SATORU
分类号 G06F9/46;G06F9/48 主分类号 G06F9/46
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