发明名称 DATA EDITION PROCESSOR
摘要 PURPOSE:To efficiently perform a MOVE operation, by attaching a memory data register which holds data to be MOVE-ed transiently, and control logic which executes the MOVE operation. CONSTITUTION:An address 3 and the output signal of a sub address register 4 are selected, and are inputted to a main address register 9. Output of them, the content of the sub address register 4 is added on the number of MOVE bytes outputted from the control logic 6 by an adder 5 passing through the main address register 9, and is returned to the sub address register 4 again. The output of the main address register becomes the address of a memory 2 directly. Read data from the memory 2 is held by a memory data register 7, and the byte position of it on a memory data bus is adjusted by an aligner 8 based on a difference between the low-order two bits of the main data register 9 and the sub data register 4, and it is written on the memory 2 again.
申请公布号 JPS63316130(A) 申请公布日期 1988.12.23
申请号 JP19870151103 申请日期 1987.06.19
申请人 HITACHI LTD 发明人 KINOSHITA OSAMU;YADA KIYOSHI
分类号 G06F9/30 主分类号 G06F9/30
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