| 摘要 |
PURPOSE: To obtain the correction method and device at a high speed with an inexpensive storage capacity by applying feeding back from an output terminal of a shift register to a register stage of a shift register corresponding to terms existing in a generation polynomial. CONSTITUTION: The device is configured by providing shift registers of 11 register stages and its output is fed back simultaneously to the register stages 2, 4, 5, 6, 10. The feedback acts result of a sum as an exclusive OR function between an output bit and a bit in existence at first in a concerned register stage onto the concerned register stage. Through the constitution above, division of a 1st number m.x<11> +r introduced to the shift register by a 2nd number denoted by one bit shifted to the left at a concerned register stage is realized, and then the 1st number is divided by a number corresponding to a number of a term G(x) of a generation polynomial. |
