发明名称 Algebraic coder-decoder for Reed Solomon and BCH block codes, applicable to telecommunications
摘要 An algebraic coder-decoder for Reed Solomon and BCH block codes is provided, namely a coprocessor of standard microprocessors specialized for algebraic processing in Galois bodies. This processor includes a clock generator which sets the rhythm of the circuit through a cycle clock and a subcycle clock, a control circuit which integrates an automatic loop system and a cycle stealing device, an arithmetic operator for carrying out simple operations on unsigned numbers representing the variables and the parameters of the algorithms a Galois operator for effecting the elementary polynomial operations in the five Galois bodies and storing the data exchanged with the host processor, an interface circuit which integrates a data exchange managament automation, a data bus, an instruction and the connections required for the control signals which connect the four blocks of the device together.
申请公布号 US4888778(A) 申请公布日期 1989.12.19
申请号 US19870112954 申请日期 1987.10.27
申请人 THOMSON-CSF 发明人 BRECHARD, DOMINIQUE;LAURENT, PIERRE-ANDRE
分类号 G06F7/72;H03M13/15 主分类号 G06F7/72
代理机构 代理人
主权项
地址