发明名称 |
FUNCTIONAL UNIT HAVING TREE STRUCTURE TO SUPPORT VECTOR SORTING ALGORITHM AND OTHER ALGORITHMS |
摘要 |
An apparatus is described having a functional unit of an instruction execution pipeline. The functional unit has a plurality of compare-and-exchange circuits coupled to network circuitry to implement a vector sorting tree for a vector sorting instruction. Each of the compare-and-exchange circuits has a respective comparison circuit that compares a pair of inputs. Each of the compare-and-exchange circuits have a same sided first output for presenting a higher of the two inputs and a same sided second output for presenting a lower of the two inputs, said comparison circuit to also support said functional unit's execution of a prefix min and/or prefix add instruction. |
申请公布号 |
US2016342418(A1) |
申请公布日期 |
2016.11.24 |
申请号 |
US201615226714 |
申请日期 |
2016.08.02 |
申请人 |
Intel Corporation |
发明人 |
IOFFE Robert M.;GALOPPO VON BORRIES Nicolas C. |
分类号 |
G06F9/30;G06F9/38;G06F7/24 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus, comprising:
a functional unit of an instruction execution pipeline have a plurality of compare-and-exchange circuits coupled to network circuitry to implement a vector sorting tree for a vector sorting instruction, each of said compare-and-exchange circuits having a respective comparison circuit that compares a pair of inputs, each of said compare-and-exchange circuits having a same sided first output for presenting a higher of the two inputs and a same sided second output for presenting a lower of the two inputs, said comparison circuit to also support said functional unit's execution of a prefix min and/or prefix add instruction. |
地址 |
Santa Clara CA US |