发明名称 ALIGNMENT OF WAFER
摘要 PURPOSE:To execute a more accurate correction by a method wherein alignment marks formed on a wafer face are expressed by using coordinates (a radius from the center of a wafer; an angle) and an expansion and contraction amount of the wafer is corrected in terms of the angle. CONSTITUTION:Out of many chips on a wafer face, chips C1...C4 having a radius value (r) of a comparatively equal distance from the central point R of a wafer are selected; coordinates (x1, y1)...(x4, y4) of their alignment marks are measured actually. Their positions are compared respectively with coordinates (x1i, y1i)...(x4i, y4i) of prescribed positions of alignment marks according to a design; a coordinate system of the latter, i.e., a linear arrangement lattice, is corrected by using a method of least squares in such a way that a difference between both is reduced to a minimum. This value is, so to speak, an average value of this correction. Then, regarding a dislocation portion which cannot be removed by the linear arrangement lattice, an expansion and contraction amount in a direction of (r) is computed for each angle theta of the measured chips and is added to the correction amount. An exposure operation of all the chips is executed by using this final correction value.
申请公布号 JPH0377310(A) 申请公布日期 1991.04.02
申请号 JP19890213268 申请日期 1989.08.19
申请人 FUJITSU LTD 发明人 TANAKA HIROYUKI
分类号 G03F9/00;H01L21/027;H01L21/30 主分类号 G03F9/00
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