发明名称 |
PROGRAMMABLE LOGIC DEVICE |
摘要 |
In selectors 210 - 213 two pull-up switching elements 40 - 403, 420 - 423, the elements being connected in series to each other in each selector, are additionally Provided instead of a don't care-setting two-input NAND gate, for connecting or disconnecting connection lines of outputs of positive logic switching elements 240 - 243 and those of negative logic switching elements 230 - 233 with or from a power supply line Vdd. First memory cells M00 - M30 control on-off states of negative logic switching elements 230 - 233 and ones 400 403 of pull-up switching elements, and second memory cells M01 - W31 control on-off states of positive logic switching elements 240 - 243 and -the others 421 - 423 of the pull-up switching elements. Thus, use of a prior art two-input NAND gate is eliminated and hence the number of transistors is reduced.
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申请公布号 |
CA2046280(A1) |
申请公布日期 |
1991.06.09 |
申请号 |
CA19902046280 |
申请日期 |
1990.12.07 |
申请人 |
KAWASAKI STEEL CORPORATION |
发明人 |
YONEDA, MASATO;KEIDA, HISAYA |
分类号 |
H03K19/173;H03K19/177;(IPC1-7):H03K19/177;H03K19/018;H03K17/693 |
主分类号 |
H03K19/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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