| 摘要 |
An edge enhancement apparatus comprises an edge detection circuit including differentiators responsive to a video signal and a PLL responsive to a H SYNC for producing a clock for displaying the video signal on a display, for example, a LCD. The PLL further includes an adder between a LPF and VCO thereof for adding an output of the differentiator to an output of the LPF to frequency-modulate the clock for edge enhancement such that when the video signal transits from a shadow to highlight levels at an edge of an image, the clock frequency is increased at the shadow level and is decreased at highlight level. In the display supplied with the frequency-modulated clock and the video signal, a distance between a pixel indicating a shadow level and another pixel showing the high-light level at the edge portion is decreased, so that the video signal is edge-enhanced. In the second apparatus, the clock is frequency-modulated at the edge such that the frequency is increased, then decreased, finally increased. Other apparatus further includes a memory for storing a video signal as a buffer storage in response to the clock to produce a edge-enhanced video signal therein in addition to the first or second apparatus.
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