发明名称 GENERATING CIRCUIT FOR ADDRESS IN POLYGON
摘要 PURPOSE:To generate picture element addresses in the polygon by generating integral coordinates since there are maximum and minimum coordinates present among integral coordinates of intersections of a scanning line and its approximate integral coordinate group without fail when the scanning crosses the polygon. CONSTITUTION:A maximum and minimum discrimination circuit 16 finds the minimum value MIN and maximum value MAX among six horizontal coordinates from linear approximate coordinate generating circuits 13 - 15 and supplies those minimum value MIN and maximum value MAX to an interpolating circuit 17. When all the supplied horizontal coordinates become codes NULL showing no intersection, the maximum and minimum discrimination circuit 16 supplies the codes NULL to the interpolating circuit 17. The interpolating circuit 17 generates a series of horizontal coordinates (X coordinate) between the minimum value MIN and maximum value MAX. The series of horizontal coordinates can be regarded as horizontal addresses XA and Y coordinates of a horizontal line outputted by a horizontal scanning circuit 9 can be regarded as vertical addresses YA.
申请公布号 JPH04137188(A) 申请公布日期 1992.05.12
申请号 JP19900259565 申请日期 1990.09.28
申请人 SONY CORP 发明人 OMORI MUTSUHIRO
分类号 G09G5/20;G06T11/40;G09G5/36;G09G5/42 主分类号 G09G5/20
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