发明名称 Clock feeding circuit and clock wiring system
摘要 Dummy power source wirings connected to a power source wiring are arranged in empty regions among the signal wirings that cross the clock wirings, the dummy power source wirings being arranged over or under the clock wirings in a manner to cross the clock wirings. The dummy power source wirings are formed to equalize the capacitances of the wirings whose lengths should be equalized among, for example, the clock distributing circuits or among the clock drivers.
申请公布号 US5140184(A) 申请公布日期 1992.08.18
申请号 US19900615930 申请日期 1990.11.20
申请人 HITACHI, LTD. 发明人 HAMAMOTO, MASATO;YAMADA, TOSHIO
分类号 G06F1/10;H01L21/82;H01L21/822;H01L27/04;H03K5/15;H03K19/0175;H04L7/00 主分类号 G06F1/10
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