发明名称 PROGRAMMING APPARATUS OF FIELD PROGRAMMABLE GATE ARRAY
摘要 <p>PURPOSE:To improve the efficiency of block allocating operation of field programmable gate arrays (FPGA's) in a field by a method wherein a mounter which mounts a plurality of FPGA's is provided and the FPGA which is most suitable for internal block allocation is selected in accordance with the data in the built-in ROM's of the FPGA's. CONSTITUTION:Respective pieces of information concerning product qualities of respective FPGA's 11 are stored in the respective ROM blocks of the FPGA's. The pieces of the information are read by electrically connectable mounting tables 15, FPGA program reading/writing apparatuses 13 and built-in ROM data reading apparatuses 17 which are corresponding to the respective FPGA's 11. The FPGA's which facilitate circuit design for block allocation predetermined by a designer are selected from among a plurality of the FPGA's having different qualities by a first selecting means. The blocks are actually allocated by a block allocating means. The FPGA which is most suitable for the actual block allocation is selected from among the FPGA's which facilitate circuit design by a second selecting means. Therefore, even an FPGA which has a minimum necessary internal product quality can be utilized.</p>
申请公布号 JPH053250(A) 申请公布日期 1993.01.08
申请号 JP19910144907 申请日期 1991.06.17
申请人 KAWASAKI STEEL CORP 发明人 MARUI TOMOTAKA;YONEDA MASATO
分类号 G11C17/00;G06F17/50;H01L21/82;H03K19/173 主分类号 G11C17/00
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