| 摘要 |
<p>PURPOSE:To achieve that one cell for RAM use is provided with a function which is twice a capacity for ROM use by a method wherein a memory cell part can be selected by the connection of an interconnection, two sets of bit lines are formed for one cell and two sets of sense amplifiers connected to them are formed. CONSTITUTION:The title IC is provided with the arrangement of a gate array. It is provided with a plurality of memory cells, a word line WT, bit lines DA1, DA2 and sense amplifiers. Each memory cell is composed of one pair of multiemitter transistors QC1, QC2, diodes SBD1, SBD2 and resistors RL1, RL2. A memory macro which can select the function of either a ROM or a RAM and which is used both as the ROM and as the RAM is built in each memory cell. In the memory cell, two sets of bit lines DA1, DA2 per row which are used both as the ROM and as the RAM and which are used exclusively as the RAM are formed; two sets of sense amplifiers which are connected to them are formed independently. Thereby, it is possible to provide a function which is twice a capacity for ROM use.</p> |
