BIT CLOCK RECOVERY CIRCUIT

摘要

PURPOSE:To improve the data recovery function by providing an edge detection means, a counter and a conversion table to the recovery circuit and selecting one conversion table among plural conversion tables. CONSTITUTION:DFF 11, 12 and a AND gate 13 generate a pulse by one period of a high frequency clock at the rise of a binarizing signal and a pulse via a gate 13 is given to a counter 14 and an output Q3 is outputted to a 3rd DFF 17 as a bit clock signal. The binarizing signal and the high frequency clock are inputted to a binarizing signal normalizing circuit 16, which generates a signal going to logical 1 at a leading edge of the binarizing signal and going to logical 0 at the fall of the bit clock signal and the signal is outputted to an FF 17. A data extract output is outputted from the FF 17. In this case, the data loaded from a ROM 15 to a counter 14 are switched and the data are effectively recovered.