发明名称 MULTIPLIER
摘要 PURPOSE:To provide the multiplier which is used in common for many-valued signals such as four-valued signal more than binary and ternary signals and provides stable, high-speed multiplication. CONSTITUTION:This multiplier is equipped with a register converting circuit RC which shifts stored data and outputs plural data, a multiplying circuit 14 which is connected to the register converting circuit RC and multiplies the output of the register converting circuit RC, an adding circuit 15 which is connected to the multiplying circuit 14 and adds the multiplication result outputted from the multiplying circuit 14 by a specific method, an AND circuit element 17 which is connected to the adding circuit 15 and shifts and sends the output of the adding circuit 15, a W register 16 which is connected to the adding circuit 15 and stores the output of the adding circuit 15 shifted according to the AND circuit element 17, an AND circuit element 18 which is connected to the W register 16 and shifts and sends the output of the W register 16, an AND circuit element 20 which is connected to the AND circuit element 18 and further shifts the output of the AND circuit element 18, and a W' register 19 which is connected to the AND circuit element 18 and stores the shifted output of the W register 16.
申请公布号 JPH05158659(A) 申请公布日期 1993.06.25
申请号 JP19910323205 申请日期 1991.12.06
申请人 SHARP CORP 发明人 YOSHIDA YUKIHIRO
分类号 G06F7/483;G06F7/49;G06F7/506;G06F7/52;G06F7/523;G06F7/527 主分类号 G06F7/483
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