| 摘要 |
PURPOSE:To provide the serial/parallel conversion circuit with a small scale configuration by providing a frame pattern detection means detecting a frame pattern representing a head of serial data not converted yet with respect to the serial/parallel conversion circuit converting input serial data into n-bit parallel data and outputting the parallel data. CONSTITUTION:The serial/parallel conversion circuit is provided with a shift means 10 shifting input serial data by a prescribed stage number, a frame pattern detection means 20 detecting a frame pattern representing a head of data from the output of the shift means 10, a serial/parallel conversion timing generating means 30 outputting a serial/parallel conversion timing signal when the frame pattern detection means 20 detects a frame pattern, and an output means 40 latching and outputting the parallel data outputted from the shift means 10. Then a head of the data is detected while the serial data are not converted yet and the serial data are converted into n-bit parallel data. |
