发明名称 METHOD FOR MOUNTING BARE CHIP IC
摘要 <p>PURPOSE:To provide a mounting method, by which the mounting area of a substrate is reduced when a plurality of bare chip ICs are mounted together, and the deviation of sealing resin is prevented when a plurality of bare chip ICs are molded. CONSTITUTION:A dam silk 2 is provided at the peripheral part of a plurality of bare chip ICs on a substrate 4. A dam silk 2, which prevents the deviation of a sealing resin 5, is provided at the suitable position in the inside of the dam silk 2 at the outer periphery. A sealing resin 5 is applied in the inside of the dam silk 2 at the outer periphery, and the bare chip ICs are sealed.</p>
申请公布号 JPH0621115(A) 申请公布日期 1994.01.28
申请号 JP19920176616 申请日期 1992.07.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 EMA TOMIYO
分类号 H01L21/56;H01L23/28;H05K3/28;(IPC1-7):H01L21/56 主分类号 H01L21/56
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