发明名称 VARIABLE FAST FOURIER TRANSFORMATION CIRCUIT
摘要 <p>PURPOSE:To make it possible to execute fast Fourier transformation(FFT) even when the number of FFT points is reduced by serially arranging divided input data points, inputting the serial array to a reference circuit for the FFT and by-passing a specific stage from an input part. CONSTITUTION:The data of an R input obtained by dividing FFT input data points N by R (R is a cardinal number) and serially arranging the divided points is inputted to the reference circuit constituted of a data rearranging circuit part 1, a twisting coefficient multiplying part 2 and a butterfly operation part 3. The reference circuit constitutes one stage and FFT is executed by serially arranging M (M=logRN) stages. The twist operation part 2 calculates a twist coefficient for (R-1) inputs out of R inputs. The butterfly operation part 3 executes crossing operation between an input which is not multiplied by a twist coefficient and an input multiplied by the twist coefficient and by- passes K stages (K<M) from the input part of an FFT circuit consisting of M stages to execute the FFT operation of N/RK FFT points.</p>
申请公布号 JPH0619955(A) 申请公布日期 1994.01.28
申请号 JP19920175838 申请日期 1992.07.03
申请人 FUJITSU LTD 发明人 FUJIE SHIGEKIMI;OKUYA SHIGEAKI;NAKAZURU TOSHIRO;MORITA NOBORU;KUBO SHINICHI
分类号 G06F17/14;(IPC1-7):G06F15/332 主分类号 G06F17/14
代理机构 代理人
主权项
地址