发明名称 MULTIPLEX TRANSMITTER
摘要 <p>PURPOSE:To reduce the burden of a processor by detecting the change of data with a data change detector means and rewriting the data according to its change to produce and transmit a message corresponding to the rewriting contents by a data holding means. CONSTITUTION:When the output pulse of a pulse converter 13a0 is inputted to a latch 14a, the code of the 1st bit of the latch 14a is set at '1' and all other bits of the latches 14a and 14b are set at '0'. Therefore this fact shows that the 1st bit of a latch 15a is changed. A set pulse SP0 is produced in the timing when the rewriting of the contents of latches 14a, 14b, 15a and 15b are complete. Thus the contents of the latch 14a are inputted to a transmission shift register 16, and a set pulse SP4 is produced in the next timing. Then the contents of the latch 14a are transmitted from the register 16 as the serial data. The contents of the latches 14b, 15a and 15b are transmitted via the register 16 in the next timing in the same way.</p>
申请公布号 JPH0630003(A) 申请公布日期 1994.02.04
申请号 JP19920207362 申请日期 1992.07.10
申请人 MAZDA MOTOR CORP 发明人 SAKAMOTO HIROAKI;NAKAZONO HIDEMI
分类号 B60R16/02;B60R16/00;B60R16/023;H04L12/40;(IPC1-7):H04L12/40 主分类号 B60R16/02
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