发明名称 TESTING METHOD FOR QUEUE CONTROL MECHANISM
摘要 PURPOSE:To easily set and test the high load state of a queue control mechanism by adding the information of a residence instruction to a processing request, issuing it, and allowing the processing request to be resident in a request queue when the residence instruction is issued by a queue control mechanism. CONSTITUTION:A memory access part 20 of a memory device successively reads a request queue 19, and performs an access to a memory 21. When an entry to which a residence request bit (p) 13a is added is detected, it is held as it is, and the processing of the next entry is operated. Then, the entry to which the residence request bit (p) 13a is added is allowed to be resident in the request queue 19, and the same situation as that at the time of the generation of the concentrated load can be easily generated by reducing the empty entry. Therefore, even in a hard constitution queue control constitution in which it is difficult to increase an access load, the load of the queue can be easily increased, and the test of the queue control can be efficiently attained.
申请公布号 JPH06175937(A) 申请公布日期 1994.06.24
申请号 JP19920329128 申请日期 1992.12.09
申请人 FUJITSU LTD 发明人 IBUSUKI TAKESHI;MIYAHARA SHINJI
分类号 G06F11/22;G06F12/16 主分类号 G06F11/22
代理机构 代理人
主权项
地址