发明名称 |
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME |
摘要 |
Semiconductor devices and methods of fabricating the same are provided. The methods of fabricating the semiconductor devices may include providing a substrate including an active pattern protruding from the substrate, forming a first liner layer and a field isolating pattern on the substrate to cover a lower portion of the active pattern, forming a second liner layer on an upper portion of the active pattern and the field isolation pattern, and forming a dummy gate on the second liner layer. |
申请公布号 |
US2016300949(A1) |
申请公布日期 |
2016.10.13 |
申请号 |
US201615062553 |
申请日期 |
2016.03.07 |
申请人 |
LEE Tae-Jong;HONG Sanghyuk;KWON TaeYong;KIM Sunjung;KIM Cheol |
发明人 |
LEE Tae-Jong;HONG Sanghyuk;KWON TaeYong;KIM Sunjung;KIM Cheol |
分类号 |
H01L29/78;H01L29/161;H01L21/8238;H01L29/165;H01L29/66;H01L29/08;H01L29/16 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
1. A method of fabricating a semiconductor device, the method comprising:
providing a substrate including an active pattern protruding from the substrate; forming a first liner layer on the substrate to cover the active pattern; forming a field isolation insulating layer on the first liner layer; etching the field isolation insulating layer and the first liner layer to form a field isolation pattern that exposes an upper portion of the active pattern and covers a lower portion of the active pattern; forming a second liner layer on the upper portion of the active pattern and the field isolation pattern; forming a dummy gate on the second liner layer and crossing the active pattern; forming spacer patterns on sidewalls of the dummy gate and the second liner layer; etching the second liner layer which is formed on the active pattern and is not covered by the dummy gate and the spacer patterns; forming an interlayer insulating layer on the field isolation pattern and the active pattern at opposite sides of the dummy gate; forming an opening in the interlayer insulating layer by removing the dummy gate; forming a gate insulating pattern in the opening; and forming a gate pattern on the gate insulating pattern in the opening. |
地址 |
Hwaseong-si KR |