| 摘要 |
PURPOSE: To eliminate a loss due to excessive polishing and reduce the manufacturing time, by using a moat surrounding an island having a metallic pattern thereon. CONSTITUTION: A substrate 36 is covered with a first insulating layer 38. A moat 44 that surrounds an island 50 is formed in the insulating layer 38. Metallic patterns 40 and 42 are formed on the insulating layer 38. The metallic patterns 40 and 42 are covered conformably with a second insulating layer 52. After an integrated circuit 30 is formed, the insulating layer 52 is polished chemically and mechanically to planarize the upper face of a chip region 32. In this case, an insulated part of the metallic pattern 42 is abraded faster than an upper part of the metallic pattern 40 of the insulating layer 52. The chemical mechanical polishing is continued until the upper part of the metallic pattern 42 is completely removed. The part of the chip region 32 of the insulating layer 52 is polished and planarized. Then, monitoring for ending the chemical mechanical polishing can be carried out visually. |
