| 摘要 |
The method includes the steps of depositing a 1st conducting layer (11) on the semiconductor structure to connect the layer (11) with the poly-Si pad (8A) to form a 1st insulating layer (12) thereon to remove the layer (12) portion on the drain, depositing a 2nd conducting layer (14) thereon to connect the layer (14) with the lower layer (12) to form a 2nd insulating layer (15) thereon to remove the layer (15) portion except the drain upper portion, depositing a 3rd conducting layer (17) on the layer (15) to connect the layer (17) with the lower layer (14), and etching the layers (17,14,15,12) to form a charge storage electrode with the 1st, 2nd and 3rd conductive patterns (11A,14A,17A).
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