| 摘要 |
<p>PURPOSE:To obviate the short-circuit defects in the packaging time of semiconductor device thereby enhancing the yield of an electronic device by removing at least a part of the second wiring layer on the periphery of an outer lead hole. CONSTITUTION:A Cu conductor layer and an insulating tape 2 formed on the rear surface are patterned by photolithographic and etching technologies so as to make a device hole and an outer lead hole. At this time, the second wiring layer 4 is removed on the periphery of an outer lead hole. Thus, even if an outer lead 3c is bent on the insulating tape 2 side near the terminal end of the insulating tape 2 to be soldered onto a printed substrate 6, the solder 7 for packaging the outer lead 3c does not come into contact with the second conductor layer 4. Accordingly, the outer lead 3c is not short-circuited with the second conductor layer 4 thereby enabling the short-circuit defects in the packaging time to be obviated further enhancing the yield of an electrode device.</p> |
