Register for variable threshold peak qualification for recording channels.

摘要

A survival sequence register for a read channel employing a variable threshold peak qualification technique, has a first data shift register (F7-F14) receiving a logic sum stream RLL_IN of two serial streams of coded digital data, (SWP,SWN) corresponding to qualified peaks detected by a reading pick-up of positive and negative sign, respectively, and a pointer register (F15-F22). A control circuit (CONTROL) generates an erase signal when an incoming pulse is recognized as corresponding to a detected peak of the same sign of the precedingly detected peak. The erase signal is input to combinative logic gates, each driving a reset terminal of a flip-flop of the data shift register, with the exception of the first flip-flop of the register. The pointer register being reset when the control circuit receives a pulse corresponding to a peak of opposite polarity of the detected peak relative to the preceding pulse.