发明名称 FAULT MONITORING SYSTEM
摘要 PURPOSE:To discriminate which equipment generates a fault by monitoring the fault of each control equipment by monitoring the cycle of a clock signal, which is generated when any fault is generated at each control equipment, on a monitor line with a cycle monitoring means. CONSTITUTION:When any fault is generated, a changeover switch 411 is operated, and the clock to be inputted to a terminal A is outputted to a terminal B1. Terminals B1-BN of respective cards are linked by a monitor line 5, the change point of rise is detected by a rise detection circuit 2, and interruption is generated at a CPU circuit 1. At the CPU, the cycle of the clock outputted to the monitor line 5 is measured by measuring the time of interruption generation. When the clock in a cycle T is inputted to a frequency divider 412 of a card 41 and all the cards are normal, no clock signal appears on the monitor line 5. When the fault is generated at any card K, the clock at a frequency outputted to the card preceding to that card K appears. Therefore, which card generates the fault can be discriminated by measuring the cycle of the monitor line at the CPU.
申请公布号 JPH07160538(A) 申请公布日期 1995.06.23
申请号 JP19930310514 申请日期 1993.12.10
申请人 NEC CORP 发明人 YOSHIDA SHU
分类号 G06F11/30;G06F11/00;G06F13/00 主分类号 G06F11/30
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