发明名称 EXCLUSIVE LOGIC ADDING SYSTEM AND ITS METHOD OF BINARY LEVEL LOGIC AND MULTIPLE LEVEL LOGIC
摘要 The binary multi-valued ANDing operator comprises a multi-valued signal input line for transmitting a multi-valued logic signal supplied from a multi-valued logic signal source; a multi-valued signal minimum value input line for transmitting the minimum value signal of the multi-valued logic signal; and a selection unit for inputting the multi-valued logic signal and its minimum value signal at its input terminals and a binary signal at its control terminal and outputting one of the multi-valued logic signal and its minimum value signal according to the binary signal.
申请公布号 KR950010823(B1) 申请公布日期 1995.09.23
申请号 KR19930025911 申请日期 1993.11.30
申请人 KOREA ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 KIM, JIN - OP;KIM, SON - YONG;LEE, JOM - DO
分类号 G06F7/50;(IPC1-7):G06F7/50 主分类号 G06F7/50
代理机构 代理人
主权项
地址