MOST SIGNIFICANT 1 LOGIC ADDRESS DETECTING METHOD AND ITS CIRCUIT

摘要

outputting a first detection signal in response to the logics of first to fourth data bit received by dividing input bits to a descending series on the basis of the most significant bit or to an ascending series on the basis of the least significant bit, providing first and second data bit to first and second input terminals, providing third and fourth data bit reversed by a first NOR gate to a third input terminal; outputting a second detection signal by again dividing the first to fourth data bit to the descending series or the ascending series, providing an output signal of the first NOR gate to the first input terminal and providing the seventh and eighth data bit of the fifth to eighth data bits reversed by the second NOR gate to the second input terminal so as to confirm the existence of the data bit having logic "1" of the data bit group, and NAND gating the signals; and outputting a third detection signal by again dividing the fifth to eighth data bit to the descending series or the ascending series, providing a signal obtained in compounding the sixth data bit and an output signal of the second NOR gate to the first input terminal and providing a signal obtained in compounding the eighth data bit and an output signal of third NOR gate to the second input terminal so as to confirm the existence of the data bit having logic "1" of the data bit group, and NAND gating the signals