发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To provide a semiconductor IC(integrated circuit) which contains a reset signal and suppress the peak current produced in a reset mode in order to reduce noises on a power supply and a ground and also to suppress a latch-up state. CONSTITUTION:A 1st internal reset signal 6 that passes through a noise elimination circuit 5 is inputted to a delay circuit 7 of a delay time T0, and a 2nd internal reset signal 6a is outputted. Then a circuit that constructs a semiconductor IC 1a is divided into the logic circuit blocks 3a and 3b which have the same increment of current consumption measured in a reset mode. The signals 6 and 6a of different timings are supplied to both blocks 3a and 3b. Thus the increase of current can be halved in a reset mode.</p>
申请公布号 JPH088706(A) 申请公布日期 1996.01.12
申请号 JP19940162900 申请日期 1994.06.22
申请人 NEC CORP 发明人 KANEKO SHIGEHARU
分类号 G06F1/24;G11C11/41;H03K5/15;H03K17/16;H03K17/22;(IPC1-7):H03K17/22 主分类号 G06F1/24
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