发明名称 ATM ADAPTATION LAYER RX FOR FIXED BIT RATE IMAGE SERVICE
摘要 an input/output signal generator driven by a system clock supplied from a network; a video codec connector for impendence-matching an input/output signal from the input/output signal generator and a video signal upon connection of a video codec; a convergence part layer generator for generating a CS-PDU payload by processing a convergence part layer which receives the input/output signal from the input/output signal generator and data and a clock signal from the video codec connector; an SAR part layer processor for receiving an output signal from the convergence part layer generator to generate an SAR header and for connecting the header to the CS-PDU payload to transmit the connected SAR-PDU payload to an asynchronous transfer mode layer; a clock information generator for receiving the input/output signal from the input/output signal generator and the clock signal from the video codec connector and for generating acknowledging information being synchronous to a network driving clock and required for clock restoration; and a managing/state signal processor for communicating a managing/state signal in a transmitting part to an external controller.
申请公布号 KR960002683(B1) 申请公布日期 1996.02.24
申请号 KR19920024194 申请日期 1992.12.14
申请人 KOREA ELECTRONICS ADN TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 JUNG, DONG - BUM;SIN, YOUNG - SUK;OH, JIN - TAE;CHOE, MOON - KI
分类号 H04L12/28;(IPC1-7):H04L12/56 主分类号 H04L12/28
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