发明名称 POWER-ON RESETTING CIRCUIT
摘要 <p>PURPOSE: To provide the power-ON resetting circuit which can securely initialize a synchronous circuit part and an asynchronous circuit part. CONSTITUTION: The power-ON resetting circuit which activates a power-ON reset signal when the power source is turned ON and inactivates it a specific time later is equipped with a clock detecting circuit 2 which outputs a clock detection signal PORC when one or >=2 clock signals CK are detected after the power source is turned ON; and the power-ON reset signal POR is activated at least until the clock detecting circuit 2 outputs the clock detection signal PORC. The clock detecting circuit 2 is provided preferably with an integration circuit which integrates the clock signal CK and a threshold circuit which outputs the clock detection signal when the integration output of the integration circuit exceeds a specific threshold value. In another way, the clock detecting circuit 2 is equipped with a counter circuit which is initialized when the power source is turned ON and outputs the clock detection signal PORC by counting a specific number of subsequent clock signals CK.</p>
申请公布号 JPH0863264(A) 申请公布日期 1996.03.08
申请号 JP19940200353 申请日期 1994.08.25
申请人 FUJITSU LTD 发明人 NARITA HIROKI
分类号 G06F1/24;G06F1/04;(IPC1-7):G06F1/24 主分类号 G06F1/24
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