| 摘要 |
<p>PURPOSE: To suppress lowering of the wiring field and integration as well as increase of cost by performing perfect planarization prior to formation of a first wiring layer and forming an intermetallic antifuse by self-aligned technology. CONSTITUTION: An Al layer 3 and a Ti/TiN layer 4 are formed by sputtering on a sufficiently planar silicon insulation film 2 deposited on a semiconductor substrate 1. The laminate 3, 4 of Al/Ti/TiN is then patterned to form a first wiring layer 5. Subsequently, an insulation film 6 is deposited and then abraded until the surface of Ti/Tin laminate 4 of the first wiring layer 5 is exposed thus obtaining a structure where the first wiring layer 5 is embedded in the insulation film 6. Thereafter silicon nitride 7 is deposited followed by sputtering of a TiN layer 8 and an Al layer 9. The laminate 7, 8, 9 is then patterned to be perpendicular to the first wiring layer 5 thus forming a second wiring layer 10. Finally, a passivation film 11 is deposited thus forming an antifuse at the intersection of first and second wiring layers 5, 10 while being self- aligned.</p> |
