发明名称 METHOD AND ARRANGEMENT FOR ELIMINATING THE INFLUENCE OF HIGH-CAPACITANCE NODES
摘要 <p>The invention relates to a method and an arrangement for avoiding the influence of a high-capacitance node on digital signal transfer in relation to a VLSI-circuit chip, for instance a CMOS-chip. A digital signal having voltage swing is converted to a digital signal having current swing and stabilized potential at the input of said node. The current swing signal is converted back to a voltage swing signal at the output of the node.</p>
申请公布号 WO1996009709(A2) 申请公布日期 1996.03.28
申请号 SE1995001054 申请日期 1995.09.19
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址