INTEGRATED CIRCUIT AND SYNCHRONIZING RESET CIRCUIT,申请号JP19940286931-传众专利搜索

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发明名称	INTEGRATED CIRCUIT AND SYNCHRONIZING RESET CIRCUIT
摘要
申请公布号	JPH08146090(A)	申请公布日期	1996.06.07
申请号	JP19940286931	申请日期	1994.11.21
申请人	NEC ENG LTD	发明人	SHIMADA TETSUHIRO
分类号	G01R31/28;G06F11/22;H01L21/66	主分类号	G01R31/28
代理机构		代理人
主权项
地址

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