| 摘要 |
PURPOSE: To provide a digital signal processor capable of accelerating a digital signal processing and reducing the programs of a processing method, mounting area and power consumption. CONSTITUTION: A data driving execution part 30 is constituted of a product sum/addition part 21 and a control part 22 and a data processing execution part 31 is constituted of the product sum/addition part 23, a burrel shifter logic part 24 and a register file 25. Corresponding to the program controlled by a program control part 26, a data driving operation is performed in the data driving execution part 30 and data-driven data are processed in the data processing execution part 31. |
