发明名称 MULTILAYER WIRING BOARD
摘要 <p>PURPOSE: To enhance the reliability by enhancing the bonding strength the via hole conductor and an I/O pin of a multilayered wiring board, employing a glass ceramic board, for mounting an IC chip. CONSTITUTION: An inner wiring layer 2 separated by 700μm or more from the surface of a glass ceramic board 1 is connected stepwise with an I/O pin 6 through a first via hole conductor 4 connecting between an intermediate wiring layer 3 separated by 40-700μm from the surface of the board and the I/O pin, and a second via hole conductor 5 connecting between the intermediate wiring layer 3 and the inner wiring layer 2. With such an arrangement, a thin film pad 7 can be protected against delamination due to difference in the coefficients of thermal expansion between the via hole conductor and the glass ceramic board.</p>
申请公布号 JPH08298381(A) 申请公布日期 1996.11.12
申请号 JP19950103734 申请日期 1995.04.27
申请人 NEC CORP 发明人 SHIBUYA AKINOBU;KIMURA HIKARI
分类号 H05K3/46;H01L21/768;H05K1/00;H05K1/03;(IPC1-7):H05K3/46 主分类号 H05K3/46
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