发明名称 DIGITAL SIGNAL TRANSMISSION LINE
摘要 <p>PURPOSE: To reduce the noise effects when the digital signals are transmitted within an integrated circuit. CONSTITUTION: The clock signal CLK (the digital signal to be transmitted) which is outputted from a buffer circuit 1 is transmitted via a conductor pattern 8. Then a signal the inverse of CLK is transmitted via a conductor pattern 9. A differential amplifier 7 reproduces the signal CLK based on the result of voltage comparison obtained between both patterns 8 and 9 which are placed close to each other. Therefore, if a noise occurs on the digital signal of the pattern 8, the noise having a similar waveform to the noise of the pattern 8 occurs also on the pattern 9. In other words, the difference has substantially no variance between both patterns 8 and 9 even if the levels of these patterns vary by the noises. As a result, the noise effects can be eliminated for the output of the amplifier 7.</p>
申请公布号 JPH08307460(A) 申请公布日期 1996.11.22
申请号 JP19950112169 申请日期 1995.05.10
申请人 YAMAHA CORP 发明人 TAHASHI ICHIRO
分类号 H04L25/02;G06F1/04;G06F1/10;(IPC1-7):H04L25/02 主分类号 H04L25/02
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