| 摘要 |
PURPOSE: To provide a rounding processing circuit which is capable of performing the high speed rounding processing in the calculation of an exponent part variable-length floating-point number based on multiple exponential splitting. CONSTITUTION: The significant digits of the exponent 300 outputted from an arithmetic circuit 20 is encoded into an exponent code 301 by an exponential digit detection circuit 21. Based on this encoding, the rounding location of a mantissa is decided by a mantissa rounding addition bit generation circuit 40 and a mantissa rounding addition bit 401 is generated, the mantissa addition bit 401 and the mantissa 400 are added by an adder 23 and a rounding is performed. At this time, the carry (borrow) 200 of the mantissa from the adder 23 is detected, an exponent part carry addition bit 303 is generated at a prescribed location by an exponent part carry addition bit generation circuit 50, the bit is added to the exponent part 302 generated by a round-down processing and the carry processing to the exponent part is performed. |
