| 摘要 |
PURPOSE: To scale down error diffusin circuits and to reduce pseudo-patterns due to error diffusion. CONSTITUTION: In an error diffusion circuit in which reproduction errors in the vertical-, oblique-, and horizontal directions are added by addition circuits in the vertical-, oblique-, and horizontal directions to obtain a diffusion output signal; the difference between this diffusion output signal and the deviation data of the luminous brightness characteristic is calculated by an error arithmetic circuit 48; this value of calculation is multiplied with the factor of error weighting in an error weighting circuit; and the respective signals delayed in the delay circuits of the vertical-, oblique-, and horizontal directions are outputted to the addition circuits of the vertical-, oblique-, and horizontal directions as reproduction errors; the delay circuits of vertical- and oblique directions are composed from a FIFO memory 56 and a one dot delay circuit D7 to halve the conventional number of the line delay circuits and then the errors are made to diffuse in the horizontal-, vertical-, and oblique directions. A first- and a second factor switching circuits 60, 62 are installed to switch the factor of error diffusion for each pixel depending on the polarity of noise, to reverse the polarity of noise for each frame and to make the errors diffuse roughly uniformly over the whole screen.
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