发明名称 DIGITAL CONVERGENCE APPARATUS
摘要 A field memory stores convergence adjusting data which corresponds to a plurality of points on a display screen. An interpolation calculation circuit creates interpolation convergence adjusting data for correction points located between adjacent adjusting points, using a plurality of adjusting data items and interpolation coefficients. The output of the interpolation calculation circuit is subjected to digital/analog conversion and passed through a low-pass filter, thereby forming a convergence correction signal. This correction signal is supplied to each deflection coil. At the time of creating interpolation adjusting data for a point located between adjusting points, an optimal interpolation coefficient is output from a ROM or a ROM, depending upon whether the point is included in the odd or even field.
申请公布号 CA2182546(A1) 申请公布日期 1997.03.09
申请号 CA19962182546 申请日期 1996.08.01
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 FUJIWARA, MASANORI;SAKAMOTO, TSUTOMU;TSUZUKI, YOSHIJI;MIHARA, HISAYUKI;OBAYASHI, TOSHIO
分类号 H04N9/28;(IPC1-7):H04N9/28 主分类号 H04N9/28
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