| 摘要 |
a semiconductor substrate with a trench having a bottom surface and both side walls; a first N+ doping region formed in the semiconductor substrate; a second P+ doping region formed in the semiconductor substrate by including the first doping region; a third P+ doping region formed in the semiconductor substrate which is adjacent to the top of the trench; a first insulating layer which is formed inside the trench and on the upper surface of the semiconductor substrate and has an open aperture revealing the first doping region; a gate electrode layer formed on the surface of the first insulating layer; a second insulating layer formed on the upper surface of the gate electrode layer; a third insulating layer formed on the side of the gate electrode layer; a semiconductor layer which is formed on the bottom of the trench and is contacted to the first doping region; and a forth N+ doping region formed on the upper part of the trench and on the upper surface of the second insulating layer.
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