发明名称 COLUMN REDUNDANCY CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE
摘要 Redundant column decoder makes normal column disable, and redundancy column enable by regular address signal. Redundant column control pulse generating circuit controls redundant column selection with the output signal of redundant column decoder lead. Array block selecting control means generates regular array block selecting signal correspond to the output signal of redundant control pulse generating circuit and redundant column decoder. At this time, redundant column decoder lead makes the neighboring redundant column of memory cell array block enable in defect aiding.
申请公布号 KR970010649(B1) 申请公布日期 1997.06.28
申请号 KR19920014963 申请日期 1992.08.20
申请人 SAMSUNG ELECTRONICS CO.,LTD 发明人 CHON, TAE-SOO;KWAK, CHOONG-KEUN
分类号 G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/00
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